From 1695fe746e1a0f88172947e5ed2b1b5cb91753c9 Mon Sep 17 00:00:00 2001 From: Daniel King Date: Mon, 23 Feb 2026 10:43:23 +0000 Subject: [PATCH] stm32g4xx-runtimes v15.0.1 (#1809) --- .../embedded_stm32g4xx-15.0.1.toml | 144 ++++++++++++++++++ .../light_stm32g4xx-15.0.1.toml | 143 +++++++++++++++++ .../light_tasking_stm32g4xx-15.0.1.toml | 144 ++++++++++++++++++ 3 files changed, 431 insertions(+) create mode 100644 index/em/embedded_stm32g4xx/embedded_stm32g4xx-15.0.1.toml create mode 100644 index/li/light_stm32g4xx/light_stm32g4xx-15.0.1.toml create mode 100644 index/li/light_tasking_stm32g4xx/light_tasking_stm32g4xx-15.0.1.toml diff --git a/index/em/embedded_stm32g4xx/embedded_stm32g4xx-15.0.1.toml b/index/em/embedded_stm32g4xx/embedded_stm32g4xx-15.0.1.toml new file mode 100644 index 00000000..a9110853 --- /dev/null +++ b/index/em/embedded_stm32g4xx/embedded_stm32g4xx-15.0.1.toml @@ -0,0 +1,144 @@ +name = "embedded_stm32g4xx" +description = "embedded runtime for the STM32G4xx SoC" +version = "15.0.1" + +long-description = """ +## Usage + +First edit your `alire.toml` file and add the following elements: + - Add `embedded_stm32g4xx` in the dependency list: + ```toml + [[depends-on]] + embedded_stm32g4xx = "*" + ``` + - if applicable, apply any runtime configuration variables (see below). + +Then edit your project file to add the following elements: + - "with" the run-time project files. With this, gprbuild will compile the run-time before your application + ```ada + with "runtime_build.gpr"; + with "ravenscar_build.gpr"; + ``` + - Specify the `Target` and `Runtime` attributes: + ```ada + for Target use runtime_build'Target; + for Runtime ("Ada") use runtime_build'Runtime ("Ada"); + ``` + - specify the `Linker` switches: + ```ada + package Linker is + for Switches ("Ada") use Runtime_Build.Linker_Switches; + end Linker; + ``` + +The runtime is configurable via Alire crate configuration variables. +See the project website for full details of the available options. + +By default, the runtime is configured for the STM32G474RE. If you are using +a different MCU, then you will need to configure the runtime by adding the +following to your `alire.toml`. For example, to configure the runtime for the +STM32G431K6: +```toml +[configuration.values] +embedded_stm32g4xx.MCU_Sub_Family = "G431" +embedded_stm32g4xx.MCU_Flash_Memory_Size = "6" +``` + +By default, the runtime configures the clock tree for a 170 MHz system clock +from the high-speed internal (HSI) oscillator. If you want a different clock +configuration, then use the crate configuration variables to specify the +configuration you wish to use. For example, to configure the runtime to +generate a 170 MHz system clock from a 24 MHz HSE crystal oscillator: +```toml +[configuration.values] +# Configure a 24 MHz HSE crystal oscillator +embedded_stm32g4xx.HSE_Clock_Frequency = 24000000 +embedded_stm32g4xx.HSE_Bypass = false + +# Select PLLRCLK as the SYSCLK source +embedded_stm32g4xx.SYSCLK_Src = "PLLRCLK" + +# Configure the PLL VCO to run at 340 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M)) +embedded_stm32g4xx.PLL_Src = "HSE" +embedded_stm32g4xx.PLL_N_Mul = 85 +embedded_stm32g4xx.PLL_M_Div = 6 + +# Configure the PLLRCLK to run at 170 MHz from the 340 MHz VCO. +embedded_stm32g4xx.PLL_R_Div = 2 + +# Configure the AHB and APB to also run at 170 MHz +embedded_stm32g4xx.AHB_Pre = "DIV1" +embedded_stm32g4xx.APB1_Pre = "DIV1" +embedded_stm32g4xx.APB2_Pre = "DIV1" +``` + +The runtime will generate a compile time error when an invalid PLL configuration +is set. + +By default the PLL's Q and P clocks are enabled. If you don't need them, then you +can disable them via the crate configuration: +```toml +[configuration.values] +embedded_stm32g4xx.PLL_Q_Enable = false +embedded_stm32g4xx.PLL_P_Enable = false +``` + +The runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable` +is `true`, or when `SYSCLK_Src = "PLLRCLK"`. + +The interrupt stack sizes are also configurable: +```toml +[configuration.values] +embedded_stm32g4xx.Interrupt_Stack_Size = 1024 +embedded_stm32g4xx.Interrupt_Secondary_Stack_Size = 128 +``` +""" + +authors = ["AdaCore", "Daniel King"] +maintainers = ["Daniel King "] +maintainers-logins = ["damaki"] +licenses = "GPL-3.0-or-later WITH GCC-exception-3.1" +tags = ["embedded", "runtime", "stm32g4"] +website = "https://github.com/damaki/stm32g4xx-runtimes" + +project-files = ['runtime_build.gpr', 'ravenscar_build.gpr'] + +[configuration] +generate_c = false +output_dir = "gnat_user" + +[configuration.variables] +MCU_Sub_Family = { type = "Enum", values = ["G431", "G441", "G491", "G4A1", "G473", "G483", "G474", "G484"], default = "G474" } +MCU_Flash_Memory_Size = { type = "String", default = "E" } + +LSI_Enabled = { type = "Boolean", default = true } +LSE_Enabled = { type = "Boolean", default = false } +LSE_Bypass = { type = "Boolean", default = false } +HSE_Bypass = { type = "Boolean", default = false } +HSE_Clock_Frequency = { type = "Integer", first = 4000000, last = 48000000, default = 24000000 } +PLL_Src = { type = "Enum", values = ["HSE", "HSI16"], default = "HSI16" } +PLL_M_Div = { type = "Integer", first = 1, last = 16, default = 4 } +PLL_N_Mul = { type = "Integer", first = 8, last = 127, default = 85 } +PLL_R_Div = { type = "Enum", values = ["DIV2", "DIV4", "DIV6", "DIV8"], default = "DIV2" } +PLL_Q_Div = { type = "Enum", values = ["DIV2", "DIV4", "DIV6", "DIV8"], default = "DIV2" } +PLL_P_Div = { type = "Integer", first = 2, last = 31, default = 2 } +PLL_Q_Enable = { type = "Boolean", default = true } +PLL_P_Enable = { type = "Boolean", default = true } +SYSCLK_Src = { type = "Enum", values = ["HSI16", "HSE", "PLLRCLK"], default = "PLLRCLK" } +AHB_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512"], default = "DIV1" } +APB1_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16"], default = "DIV1" } +APB2_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16"], default = "DIV1" } + +Interrupt_Stack_Size = { type = "Integer", first = 1, default = 1024 } +Interrupt_Secondary_Stack_Size = { type = "Integer", first = 1, default = 128 } + +[[depends-on]] +gnat_arm_elf = "^15" + +[origin] +hashes = [ +"sha256:84eed2b7b5cead97d434f6128245389dd8f66319cd9edd3d5dacad1c5e2a6c5a", +"sha512:6f1cc647e93fd3666f9d515a2defc0e8ee7a301cf97c5b7d300c1b2e04a150a45a81bef3cab21425e2ae0a3cc59c2bd6629523959b3bc8f4f8edf9eb31d3884f", +] +url = "https://github.com/damaki/stm32g4xx-runtimes/releases/download/v15.0.1/embedded-stm32g4xx-15.0.1.tar.gz" + diff --git a/index/li/light_stm32g4xx/light_stm32g4xx-15.0.1.toml b/index/li/light_stm32g4xx/light_stm32g4xx-15.0.1.toml new file mode 100644 index 00000000..a2919469 --- /dev/null +++ b/index/li/light_stm32g4xx/light_stm32g4xx-15.0.1.toml @@ -0,0 +1,143 @@ +name = "light_stm32g4xx" +description = "light runtime for the STM32G4xx SoC" +version = "15.0.1" + +long-description = """ +## Usage + +First edit your `alire.toml` file and add the following elements: + - Add `light_stm32g4xx` in the dependency list: + ```toml + [[depends-on]] + light_stm32g4xx = "*" + ``` + - if applicable, apply any runtime configuration variables (see below). + +Then edit your project file to add the following elements: + - "with" the run-time project files. With this, gprbuild will compile the run-time before your application + ```ada + with "runtime_build.gpr"; + ``` + - Specify the `Target` and `Runtime` attributes: + ```ada + for Target use runtime_build'Target; + for Runtime ("Ada") use runtime_build'Runtime ("Ada"); + ``` + - specify the `Linker` switches: + ```ada + package Linker is + for Switches ("Ada") use Runtime_Build.Linker_Switches; + end Linker; + ``` + +The runtime is configurable via Alire crate configuration variables. +See the project website for full details of the available options. + +By default, the runtime is configured for the STM32G474RE. If you are using +a different MCU, then you will need to configure the runtime by adding the +following to your `alire.toml`. For example, to configure the runtime for the +STM32G431K6: +```toml +[configuration.values] +light_stm32g4xx.MCU_Sub_Family = "G431" +light_stm32g4xx.MCU_Flash_Memory_Size = "6" +``` + +By default, the runtime configures the clock tree for a 170 MHz system clock +from the high-speed internal (HSI) oscillator. If you want a different clock +configuration, then use the crate configuration variables to specify the +configuration you wish to use. For example, to configure the runtime to +generate a 170 MHz system clock from a 24 MHz HSE crystal oscillator: +```toml +[configuration.values] +# Configure a 24 MHz HSE crystal oscillator +light_stm32g4xx.HSE_Clock_Frequency = 24000000 +light_stm32g4xx.HSE_Bypass = false + +# Select PLLRCLK as the SYSCLK source +light_stm32g4xx.SYSCLK_Src = "PLLRCLK" + +# Configure the PLL VCO to run at 340 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M)) +light_stm32g4xx.PLL_Src = "HSE" +light_stm32g4xx.PLL_N_Mul = 85 +light_stm32g4xx.PLL_M_Div = 6 + +# Configure the PLLRCLK to run at 170 MHz from the 340 MHz VCO. +light_stm32g4xx.PLL_R_Div = 2 + +# Configure the AHB and APB to also run at 170 MHz +light_stm32g4xx.AHB_Pre = "DIV1" +light_stm32g4xx.APB1_Pre = "DIV1" +light_stm32g4xx.APB2_Pre = "DIV1" +``` + +The runtime will generate a compile time error when an invalid PLL configuration +is set. + +By default the PLL's Q and P clocks are enabled. If you don't need them, then you +can disable them via the crate configuration: +```toml +[configuration.values] +light_stm32g4xx.PLL_Q_Enable = false +light_stm32g4xx.PLL_P_Enable = false +``` + +The runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable` +is `true`, or when `SYSCLK_Src = "PLLRCLK"`. + +The interrupt stack sizes are also configurable: +```toml +[configuration.values] +light_stm32g4xx.Interrupt_Stack_Size = 1024 +light_stm32g4xx.Interrupt_Secondary_Stack_Size = 128 +``` +""" + +authors = ["AdaCore", "Daniel King"] +maintainers = ["Daniel King "] +maintainers-logins = ["damaki"] +licenses = "GPL-3.0-or-later WITH GCC-exception-3.1" +tags = ["embedded", "runtime", "stm32g4"] +website = "https://github.com/damaki/stm32g4xx-runtimes" + +project-files = ['runtime_build.gpr'] + +[configuration] +generate_c = false +output_dir = "gnat_user" + +[configuration.variables] +MCU_Sub_Family = { type = "Enum", values = ["G431", "G441", "G491", "G4A1", "G473", "G483", "G474", "G484"], default = "G474" } +MCU_Flash_Memory_Size = { type = "String", default = "E" } + +LSI_Enabled = { type = "Boolean", default = true } +LSE_Enabled = { type = "Boolean", default = false } +LSE_Bypass = { type = "Boolean", default = false } +HSE_Bypass = { type = "Boolean", default = false } +HSE_Clock_Frequency = { type = "Integer", first = 4000000, last = 48000000, default = 24000000 } +PLL_Src = { type = "Enum", values = ["HSE", "HSI16"], default = "HSI16" } +PLL_M_Div = { type = "Integer", first = 1, last = 16, default = 4 } +PLL_N_Mul = { type = "Integer", first = 8, last = 127, default = 85 } +PLL_R_Div = { type = "Enum", values = ["DIV2", "DIV4", "DIV6", "DIV8"], default = "DIV2" } +PLL_Q_Div = { type = "Enum", values = ["DIV2", "DIV4", "DIV6", "DIV8"], default = "DIV2" } +PLL_P_Div = { type = "Integer", first = 2, last = 31, default = 2 } +PLL_Q_Enable = { type = "Boolean", default = true } +PLL_P_Enable = { type = "Boolean", default = true } +SYSCLK_Src = { type = "Enum", values = ["HSI16", "HSE", "PLLRCLK"], default = "PLLRCLK" } +AHB_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512"], default = "DIV1" } +APB1_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16"], default = "DIV1" } +APB2_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16"], default = "DIV1" } + +Interrupt_Stack_Size = { type = "Integer", first = 1, default = 1024 } +Interrupt_Secondary_Stack_Size = { type = "Integer", first = 1, default = 128 } + +[[depends-on]] +gnat_arm_elf = "^15" + +[origin] +hashes = [ +"sha256:5d56026f93f68692a1512ab449a6e07898cd2d868330ffbab926f31aeacd3ce3", +"sha512:e00194f7f91e0f22fe3324486225c535dc22d1f4af96b5195605a68f6043501b7be8bf5bb6c4eff34fa669dcd67d4c0bb53f164310768bf1e7b3534f7bd53630", +] +url = "https://github.com/damaki/stm32g4xx-runtimes/releases/download/v15.0.1/light-stm32g4xx-15.0.1.tar.gz" + diff --git a/index/li/light_tasking_stm32g4xx/light_tasking_stm32g4xx-15.0.1.toml b/index/li/light_tasking_stm32g4xx/light_tasking_stm32g4xx-15.0.1.toml new file mode 100644 index 00000000..deb32a91 --- /dev/null +++ b/index/li/light_tasking_stm32g4xx/light_tasking_stm32g4xx-15.0.1.toml @@ -0,0 +1,144 @@ +name = "light_tasking_stm32g4xx" +description = "light-tasking runtime for the STM32G4xx SoC" +version = "15.0.1" + +long-description = """ +## Usage + +First edit your `alire.toml` file and add the following elements: + - Add `light_tasking_stm32g4xx` in the dependency list: + ```toml + [[depends-on]] + light_tasking_stm32g4xx = "*" + ``` + - if applicable, apply any runtime configuration variables (see below). + +Then edit your project file to add the following elements: + - "with" the run-time project files. With this, gprbuild will compile the run-time before your application + ```ada + with "runtime_build.gpr"; + with "ravenscar_build.gpr"; + ``` + - Specify the `Target` and `Runtime` attributes: + ```ada + for Target use runtime_build'Target; + for Runtime ("Ada") use runtime_build'Runtime ("Ada"); + ``` + - specify the `Linker` switches: + ```ada + package Linker is + for Switches ("Ada") use Runtime_Build.Linker_Switches; + end Linker; + ``` + +The runtime is configurable via Alire crate configuration variables. +See the project website for full details of the available options. + +By default, the runtime is configured for the STM32G474RE. If you are using +a different MCU, then you will need to configure the runtime by adding the +following to your `alire.toml`. For example, to configure the runtime for the +STM32G431K6: +```toml +[configuration.values] +light_tasking_stm32g4xx.MCU_Sub_Family = "G431" +light_tasking_stm32g4xx.MCU_Flash_Memory_Size = "6" +``` + +By default, the runtime configures the clock tree for a 170 MHz system clock +from the high-speed internal (HSI) oscillator. If you want a different clock +configuration, then use the crate configuration variables to specify the +configuration you wish to use. For example, to configure the runtime to +generate a 170 MHz system clock from a 24 MHz HSE crystal oscillator: +```toml +[configuration.values] +# Configure a 24 MHz HSE crystal oscillator +light_tasking_stm32g4xx.HSE_Clock_Frequency = 24000000 +light_tasking_stm32g4xx.HSE_Bypass = false + +# Select PLLRCLK as the SYSCLK source +light_tasking_stm32g4xx.SYSCLK_Src = "PLLRCLK" + +# Configure the PLL VCO to run at 340 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M)) +light_tasking_stm32g4xx.PLL_Src = "HSE" +light_tasking_stm32g4xx.PLL_N_Mul = 85 +light_tasking_stm32g4xx.PLL_M_Div = 6 + +# Configure the PLLRCLK to run at 170 MHz from the 340 MHz VCO. +light_tasking_stm32g4xx.PLL_R_Div = 2 + +# Configure the AHB and APB to also run at 170 MHz +light_tasking_stm32g4xx.AHB_Pre = "DIV1" +light_tasking_stm32g4xx.APB1_Pre = "DIV1" +light_tasking_stm32g4xx.APB2_Pre = "DIV1" +``` + +The runtime will generate a compile time error when an invalid PLL configuration +is set. + +By default the PLL's Q and P clocks are enabled. If you don't need them, then you +can disable them via the crate configuration: +```toml +[configuration.values] +light_tasking_stm32g4xx.PLL_Q_Enable = false +light_tasking_stm32g4xx.PLL_P_Enable = false +``` + +The runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable` +is `true`, or when `SYSCLK_Src = "PLLRCLK"`. + +The interrupt stack sizes are also configurable: +```toml +[configuration.values] +light_tasking_stm32g4xx.Interrupt_Stack_Size = 1024 +light_tasking_stm32g4xx.Interrupt_Secondary_Stack_Size = 128 +``` +""" + +authors = ["AdaCore", "Daniel King"] +maintainers = ["Daniel King "] +maintainers-logins = ["damaki"] +licenses = "GPL-3.0-or-later WITH GCC-exception-3.1" +tags = ["embedded", "runtime", "stm32g4"] +website = "https://github.com/damaki/stm32g4xx-runtimes" + +project-files = ['runtime_build.gpr', 'ravenscar_build.gpr'] + +[configuration] +generate_c = false +output_dir = "gnat_user" + +[configuration.variables] +MCU_Sub_Family = { type = "Enum", values = ["G431", "G441", "G491", "G4A1", "G473", "G483", "G474", "G484"], default = "G474" } +MCU_Flash_Memory_Size = { type = "String", default = "E" } + +LSI_Enabled = { type = "Boolean", default = true } +LSE_Enabled = { type = "Boolean", default = false } +LSE_Bypass = { type = "Boolean", default = false } +HSE_Bypass = { type = "Boolean", default = false } +HSE_Clock_Frequency = { type = "Integer", first = 4000000, last = 48000000, default = 24000000 } +PLL_Src = { type = "Enum", values = ["HSE", "HSI16"], default = "HSI16" } +PLL_M_Div = { type = "Integer", first = 1, last = 16, default = 4 } +PLL_N_Mul = { type = "Integer", first = 8, last = 127, default = 85 } +PLL_R_Div = { type = "Enum", values = ["DIV2", "DIV4", "DIV6", "DIV8"], default = "DIV2" } +PLL_Q_Div = { type = "Enum", values = ["DIV2", "DIV4", "DIV6", "DIV8"], default = "DIV2" } +PLL_P_Div = { type = "Integer", first = 2, last = 31, default = 2 } +PLL_Q_Enable = { type = "Boolean", default = true } +PLL_P_Enable = { type = "Boolean", default = true } +SYSCLK_Src = { type = "Enum", values = ["HSI16", "HSE", "PLLRCLK"], default = "PLLRCLK" } +AHB_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512"], default = "DIV1" } +APB1_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16"], default = "DIV1" } +APB2_Pre = { type = "Enum", values = ["DIV1", "DIV2", "DIV4", "DIV8", "DIV16"], default = "DIV1" } + +Interrupt_Stack_Size = { type = "Integer", first = 1, default = 1024 } +Interrupt_Secondary_Stack_Size = { type = "Integer", first = 1, default = 128 } + +[[depends-on]] +gnat_arm_elf = "^15" + +[origin] +hashes = [ +"sha256:e3404cfe1f3a9db7e0b6ec317688b51ac75f3d6cec51da0cc0e502982ff9cf0c", +"sha512:da4179e42907f08d82c4901424375056d0c3ec3616d1ee64a0994454d10fe39ba6cbacbc76bc923fa195cb837782b68ff630f389232dfb9c19f9d352d4f43a20", +] +url = "https://github.com/damaki/stm32g4xx-runtimes/releases/download/v15.0.1/light-tasking-stm32g4xx-15.0.1.tar.gz" +